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Solid state linear amplifiers (such as the amplifiers in the RF chain of an ANAN-X transceiver or a solid state external linear amplifier) have RF output circuits that provide a fixed (designed in) RF load impedance to the output transistors*.

*In contrast to traditional tube amplifiers that incorporate a pi network with an adjustable loading capacitor.

When operating in a high duty cycle mode… such as JT65 or one of the other digital modes… reducing the RF output power level below the maximum rated RF output power level (by reducing the drive) does not typically reduce the power that will be dissipated by the output transistors. In fact, reducing the RF output level below the maximum rated RF output level will usually increase the power that will be dissipated by the output transistors.

This is because, with the transistors looking into a fixed RF impedance, the total electrical power consumed by the RF output stage is proportional to DC (average) value of the current being drawn by the transistors, but the RF output power is proportional to the square of the RF component of the output current being drawn by the transistors.

For example, with my Elecraft KXPA100 linear amplifier, running key down at full rated output on 20m:
RF output power = 100W
Average drain current = 11.3A
Drain voltage = 13.4V
Total electrical input power to the output stage = 11.3A x 13.4V = 153W
Power dissipated as heat, by the output transistors = 153W - 100W = 53W

If I reduce the RF output power to 30W, by reducing the drive:
RF output power = 32W
Average drain current = 7.2A
Drain voltage = 13.5V
Total electrical input power to the output stage = 7.2A x 13.5V = 97.2W
Power dissipated as heat, by the output transistors = 97.2W - 32W = 65.2W

If I reduce the RF output power to 15.3W, by reducing the drive:
RF output power = 15.3W
Average drain current = 5.1A
Drain voltage = 13.6V
Total electrical input power to the output stage = 5.1A x 13.6V = 69.4
Power dissipated as heat, by the output transistors = 69.4W – 15.1W = 54.1W

Stu
AB2EZ

That's very interesting, Stu, thanks for posting that!

I wonder, because of the way that openHPSDR architecture radios (i.e. every Apache Labs radio) adjusts RF drive, setting the RF power to 100W and then adjusting drive with the audio level might not be a good method. This is because the gain after the DAC is fixed. When you move the "Drive" control in PowerSDR, what you are doing is adjusting the DAC reference level. By doing it this way, the DAC dynamic range is optimized, and all DAC bits are used regardless of RF output power level. In other words, because amplifier gain is fixed and unchangeable after the DAC, openHPSDR architecture radios ALWAYS operate at maximum headroom.

What I do when running Fldigi is to set the output audio drive level of Fldigi to 0dB. Then when I execute a "Tune" in Fldigi, I adjust the drive in PowerSDR to say 50W, rather than 100W. This means that a 0dB sinewave out of Fldigi gives me 50W average (and peak, since it's continuous). Fldigi can't put out audio above 0dB, and, when it does, all DAC bits are being utilized and RF out is 50W.

Thoughts on this?

73,

Scott

Scott

The method you described for adjusting the output power... while beneficial in utilizing the full range of the D/A converter... will not have any effect on the issue of reduced RF amplifier efficiency at reduced RF output power levels.

With a fixed RF load impedance, the amplifier's drain voltage swing... at reduced peak RF output power levels... is a smaller fraction of the full DC drain supply voltage.

In order to recover the efficiency, one must either increase the RF load impedance (so that a smaller drain current swing produces a bigger drain voltage swing)... or one must reduce the DC drain supply voltage.

Reducing the DC drain supply voltage, when that voltage is supplied by a built-in DC-DC converter (as in the new 8000 series), could be done in a power-efficient way... i.e. without transferring the excess dissipation from the output RF amplifier to another component.

Stu